DFT

I would suggest you to go through the topics in the sequence shown below –

  1. DFT, Scan & ATPG
    • What is DFT
    • Fault models
    • Basics of Scan
  2. How test clock is controlled for Scan Operation using On-chip Clock Controller.
    • Why do we need OCC
    • How test clock is controlled by OCC
    • Example of a simple OCC with its systemverilog code
  3. How to define a clock architecture for Scan.
    • How to handle clock mux and clock divider
    • How to put OCC
  4. LFSR and Ring generator concepts (to learn test compression)
    • Types of LFSR
    • How to transform a modular type LFSR to Ring generator
  5. Logic Built in Self Test (LBIST)
    • Basics of LBIST
    • Test Pattern Generator
    • Phase shifter
    • How to find seed and degree of LFSR
    • And a separate page specifically for Response Analyzer(RA) of LBIST
      • Role of RA
      • Characteristics of good RA
      • Aliasing
      • Probability of Aliasing
      • LFSR based serial RA
      • CRC theory
      • LFSR based parallel RA (or MISR)
      • Masking in MISR
  6. Test compression which cover topics like –
    • Basics of test compression and EDT
    • EDT – Decompressor
    • EDT – Compactor